2945 search results - page 135 / 589 » Designing and Implementing Malicious Hardware |
133
click to vote
EUROMICRO
2000
IEEE
15 years 9 months ago
2000
IEEE
We propose a design flow for low-power and low-cost, data-dominated, embedded systems which tightly integrate different technologies and architectures. We use Mathworks’ Simuli...
143
click to vote
JSA
2008
15 years 4 months ago
2008
Nowadays, there are many protocols able to cope with process crashes, but, unfortunately, a process crash represents only a particular faulty behavior. Handling tougher failures (...
251
click to vote
SASP
2009
IEEE
15 years 11 months ago
2009
IEEE
—This paper describes a multi-threaded parallel design and implementation of the Smith-Waterman (SM) algorithm on compute unified device architecture (CUDA)-compatible graphic pr...
154
click to vote
ISSS
1997
IEEE
15 years 9 months ago
1997
IEEE
- An approach for broadband modem FIR filter design optimization is presented. It addresses the minimization of the number of addersubtractors used in the hardware implementation o...
143
click to vote
APCCAS
2006
IEEE
15 years 6 months ago
2006
IEEE
The paper presents an interpolator design for motion compensation used in the H.264 video decoding. The presented design is optimized according to the available data bandwidth to a...