2945 search results - page 454 / 589 » Designing and Implementing Malicious Hardware |
199
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CPE
1998
Springer
15 years 10 months ago
1998
Springer
This paper describes a modular and scalable simulation environment, called GloMoSim, to evaluate end-to-end performance of integrated wired and wireless networks. GloMoSim has been...
144
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ICCAD
1997
IEEE
15 years 10 months ago
1997
IEEE
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
173
Voted
MICRO
1997
IEEE
15 years 10 months ago
1997
IEEE
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
187
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ICECCS
1996
IEEE
15 years 10 months ago
1996
IEEE
This research is part of a project to develop practical, effective, formalizable, automatable techniques for integration testing. Integration testing is an important part of the t...
144
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ICCAD
1994
IEEE
15 years 10 months ago
1994
IEEE
In this paper, we study the simultaneousdriver and wire sizing (SDWS) problem under two objective functions: (i) delay minimization only, or (ii) combined delay and power dissipat...