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» Designing and Implementing Malicious Hardware
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DASIP
2010
14 years 11 months ago
Hardware code generation from dataflow programs
The elaboration of new systems on embedded targets is becoming more and more complex. In particular, multimedia devices are now implemented using mixed hardware and software archi...
Nicolas Siret, Matthieu Wipliez, Jean-Franç...
144
Voted
FPL
2004
Springer
143views Hardware» more  FPL 2004»
15 years 7 months ago
Exploring Area/Delay Tradeoffs in an AES FPGA Implementation
Abstract. Field-Programmable Gate Arrays (FPGAs) have lately become a popular target for implementing cryptographic block ciphers, as a well-designed FPGA solution can combine some...
Joseph Zambreno, David Nguyen, Alok N. Choudhary
FPL
1997
Springer
123views Hardware» more  FPL 1997»
15 years 8 months ago
P4: A platform for FPGA implementation of protocol boosters
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
Ilija Hadzic, Jonathan M. Smith
CCS
2007
ACM
15 years 8 months ago
Reconfigurable trusted computing in hardware
Trusted Computing (TC) is an emerging technology towards building trustworthy computing platforms. The Trusted Computing Group (TCG) has proposed several specifications to impleme...
Thomas Eisenbarth, Tim Güneysu, Christof Paar...
FCCM
2005
IEEE
89views VLSI» more  FCCM 2005»
15 years 9 months ago
A General Purpose, Highly Efficient Communication Controller Architecture for Hardware Acceleration Platforms
Although researchers have presented individual techniques to efficiently utilize the Peripheral Component Interconnect (PCI) bus, their contributions fail to provide a direct path...
Petersen F. Curt, James P. Durbano, Fernando E. Or...