2945 search results - page 75 / 589 » Designing and Implementing Malicious Hardware |
148
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ICCAD
1995
IEEE
15 years 8 months ago
1995
IEEE
Implementing a built-in self-test by a "test per clock" scheme offers advantages concerning fault coverage, detection of delay faults, and test application time. Such a ...
179
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BMCBI
2008
15 years 4 months ago
2008
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
133
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ISCAS
2007
IEEE
15 years 10 months ago
2007
IEEE
— In state of the art hardware-software-co-design flows for FPGA based systems, the hardware-software partitioning problem is solved offline, thus, omitting the great flexibil...
149
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INFOCOM
2002
IEEE
15 years 9 months ago
2002
IEEE
A multigigabit IP router may receive several millions packets per second from each input link. For each packet, the router needs to find the longest matching prefix in the forw...
144
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ITCC
2005
IEEE
15 years 10 months ago
2005
IEEE
— This paper presents FPGA (Field Programmable Gate Array) implementations of ICEBERG, a block cipher designed for reconfigurable hardware implementations and presented at FSE 2...