559 search results - page 26 / 112 » Designing secure systems on reconfigurable hardware |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—It is generally acknowledged that nanoelectronics will eventually replace traditional silicon CMOS in high-performance integrated circuits. To that end, considerable investments...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
A high-speed and secure dynamic partial reconfiguration (DPR) system is realized with AES-GCM that guarantees both confidentiality and authenticity of FPGA bitstreams. In DPR syst...
ARC
2010
Springer
13 years 7 months ago
2010
Springer
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
Dynamically reconfigurable logic is becoming an important design unit in SoC system. A method to make the reconfiguration management transparent to software applications is requir...
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's). By providing native kernel suppo...