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» Designing systems-on-chip using cores
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DATE
2008
IEEE
142views Hardware» more  DATE 2008»
13 years 9 months ago
Algorithms for Maximum Satisfiability using Unsatisfiable Cores
Many decision and optimization problems in Electronic Design Automation (EDA) can be solved with Boolean Satisfiability (SAT). Moreover, well-known extensions of SAT also find app...
João Marques-Silva, Jordi Planes
BMCBI
2008
134views more  BMCBI 2008»
13 years 7 months ago
Prediction of protein-protein binding site by using core interface residue and support vector machine
Background: The prediction of protein-protein binding site can provide structural annotation to the protein interaction data from proteomics studies. This is very important for th...
Nan Li, Zhonghua Sun, Fan Jiang
ISCAS
2003
IEEE
147views Hardware» more  ISCAS 2003»
14 years 1 months ago
Parameterized and low power DSP core for embedded systems
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
Ya-Lan Tsao, Ming Hsuan Tan, Jun-Xian Teng, Shyh-J...
DSD
2010
IEEE
144views Hardware» more  DSD 2010»
13 years 8 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen
PDCN
2007
13 years 9 months ago
Design and evaluation of an auto-memoization processor
This paper describes the design and evaluation of an auto-memoization processor. The major point of this proposal is to detect the multilevel functions and loops with no additiona...
Tomoaki Tsumura, Ikuma Suzuki, Yasuki Ikeuchi, Hir...