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» Designing systems-on-chip using cores
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DAC
2007
ACM
14 years 11 months ago
A System For Coarse Grained Memory Protection In Tiny Embedded Processors
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...
CHI
2009
ACM
14 years 10 months ago
Towards systematic usability verification
Although usability is the core aspect of the whole HCI research field, it still waits for its economic breakthrough. There are some corporations that are famous for their usable p...
Jan Borchers, Jonathan Diehl, Markus Jordans, Max ...
MICRO
2009
IEEE
129views Hardware» more  MICRO 2009»
14 years 4 months ago
Execution leases: a hardware-supported mechanism for enforcing strong non-interference
High assurance systems such as those found in aircraft controls and the financial industry are often required to handle a mix of tasks where some are niceties (such as the contro...
Mohit Tiwari, Xun Li, Hassan M. G. Wassel, Frederi...
CISIS
2008
IEEE
14 years 4 months ago
On the Potential of NoC Virtualization for Multicore Chips
As the end of Moores-law is on the horizon, power becomes a limiting factor to continuous increases in performance gains for single-core processors. Processor engineers have shifte...
Jose Flich, Samuel Rodrigo, José Duato, Tho...
MICRO
2008
IEEE
139views Hardware» more  MICRO 2008»
14 years 4 months ago
Adaptive data compression for high-performance low-power on-chip networks
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
Yuho Jin, Ki Hwan Yum, Eun Jung Kim