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» Designing systems-on-chip using cores
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SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
15 years 11 months ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar
UML
2004
Springer
15 years 11 months ago
A Metamodel for Generating Performance Models from UML Designs
Several different kinds of performance models can be generated from sets of scenarios that describe typical responses of a system, and their use of resources. The Core Scenario Mod...
Dorin Bogdan Petriu, C. Murray Woodside
DATE
2010
IEEE
147views Hardware» more  DATE 2010»
15 years 8 months ago
Detecting/preventing information leakage on the memory bus due to malicious hardware
An increasing concern amongst designers and integrators of military and defense-related systems is the underlying security of the individual microprocessor components that make up ...
Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok ...
PDCAT
2005
Springer
15 years 11 months ago
A New Algorithm to Solve Synchronous Consensus for Dependent Failures
Fault tolerant algorithms are often designed under the t-out-of-n assumption, which is based on the assumption that all processes or components fail independently with equal proba...
Jun Wang, Min Song
SASP
2008
IEEE
140views Hardware» more  SASP 2008»
16 years 7 days ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...