1226 search results - page 50 / 246 » Designing systems-on-chip using cores |
157
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CHES
2009
Springer
16 years 6 months ago
2009
Springer
Abstract. This paper presents a design-space exploration of an applicationspecific instruction-set processor (ASIP) for the computation of various cryptographic pairings over Barre...
139
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IJRR
2010
15 years 3 months ago
2010
Scarab is a prototype rover for Lunar missions to survey resources in polar craters. It is designed as a prospector that would use a deep coring drill and apply soil analysis inst...
182
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IEEEPACT
2005
IEEE
15 years 11 months ago
2005
IEEE
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
160
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EDCC
1994
Springer
15 years 10 months ago
1994
Springer
Security and reliability issues in distributed systems have been investigated for several years at LAAS using a technique called Fragmentation-Redundancy-Scattering (FRS). The aim ...
191
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VLSID
2003
IEEE
2003
IEEE
Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks
16 years 6 months ago
We present an innovative design of an accurate, 2D DCT IDCT processor, which handles scaled and sub-sampled input blocks efficiently. In the IDCT mode, the latency of the processo...