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DAC
2010
ACM
15 years 8 months ago
TSV stress aware timing analysis with applications to 3D-IC layout optimization
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee,...
ECBS
2009
IEEE
114views Hardware» more  ECBS 2009»
15 years 8 months ago
Model-Based Product-Oriented Certification
Future space missions such as the Mars Science Laboratory and Project Constellation suggest the engineering of some of the most complex man-rated software systems. The present pro...
Damian Dechev, Bjarne Stroustrup
139
Voted
ICAIL
2007
ACM
15 years 8 months ago
The Legal-RDF Ontology. A Generic Model for Legal Documents
Legal-RDF.org1 publishes a practical ontology that models both the layout and content of a document and metadata about the document; these have been built using data models implici...
John McClure
CF
2006
ACM
15 years 7 months ago
The potential of the cell processor for scientific computing
The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As...
Samuel Williams, John Shalf, Leonid Oliker, Shoaib...
FPGA
2006
ACM
90views FPGA» more  FPGA 2006»
15 years 7 months ago
Improving performance and robustness of domain-specific CPLDs
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
Mark Holland, Scott Hauck