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DATE
2000
IEEE
142views Hardware» more  DATE 2000»
15 years 9 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
ISCC
2000
IEEE
160views Communications» more  ISCC 2000»
15 years 9 months ago
The Adaptive Load Service (ALS): An ABR-Like Service for the Internet
In this paper, we present a novel approach for realizing adaptive QoS control in the Internet called the adaptive load service (ALS). ALS was designed in a similar fashion to the ...
Dorgham Sisalem, Henning Schulzrinne
CHI
2000
ACM
15 years 9 months ago
Instructional interventions in computer-based tutoring: differential impact on learning time and accuracy
We can reliably build “second generation” intelligent computer tutors that are approximately half as effective as human tutors. This paper evaluates two interface enhancements...
Albert T. Corbett, Holly J. Trask
ICRA
1999
IEEE
94views Robotics» more  ICRA 1999»
15 years 9 months ago
Computing Parallel-Jaw Grips
In this paper we propose a new model for gripping parts with an industrial parallel-jaw gripper. In contrast to many previous models, we use two grip points and define candidate g...
Gordon Smith, Eric Lee, Kenneth Y. Goldberg, Karl-...
ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
15 years 8 months ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick