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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
14 years 4 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
VEE
2006
ACM
150views Virtualization» more  VEE 2006»
14 years 4 months ago
Evaluating fragment construction policies for SDT systems
Software Dynamic Translation (SDT) systems have been used for program instrumentation, dynamic optimization, security policy enforcement, intrusion detection, and many other uses....
Jason Hiser, Daniel Williams, Adrian Filipi, Jack ...
EH
2005
IEEE
127views Hardware» more  EH 2005»
14 years 4 months ago
On the Robustness Achievable with Stochastic Development Processes
Manufacturing processes are a key source of faults in complex hardware systems. Minimizing this impact of manufacturing uncertainties is one way towards achieving fault tolerant s...
Shivakumar Viswanathan, Jordan B. Pollack
ICRA
2005
IEEE
130views Robotics» more  ICRA 2005»
14 years 4 months ago
Modeling and Control of Active End Effector for the AFM Based Nano Robotic Manipulators
Abstract— Nanomanipulation using Atomic Force Microscope (AFM) has been extensively investigated for many years. However, control of tip position during nanomanipulation is still...
Jiangbo Zhang, Guangyong Li, Ning Xi
IPPS
2005
IEEE
14 years 4 months ago
Fast Address Translation Techniques for Distributed Shared Memory Compilers
The Distributed Shared Memory (DSM) model is designed to leverage the ease of programming of the shared memory paradigm, while enabling the highperformance by expressing locality ...
François Cantonnet, Tarek A. El-Ghazawi, Pa...