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IJPP
2011
99views more  IJPP 2011»
13 years 2 months ago
Regular Lattice and Small-World Spin Model Simulations Using CUDA and GPUs
Data-parallel accelerator devices such as Graphical Processing Units (GPUs) are providing dramatic performance improvements over even multicore CPUs for lattice-oriented applicatio...
Kenneth A. Hawick, Arno Leist, Daniel P. Playne
ISCA
2008
IEEE
139views Hardware» more  ISCA 2008»
14 years 1 months ago
Atom-Aid: Detecting and Surviving Atomicity Violations
Writing shared-memory parallel programs is error-prone. Among the concurrency errors that programmers often face are atomicity violations, which are especially challenging. They h...
Brandon Lucia, Joseph Devietti, Karin Strauss, Lui...
ISCA
2009
IEEE
199views Hardware» more  ISCA 2009»
14 years 2 months ago
SigRace: signature-based data race detection
Detecting data races in parallel programs is important for both software development and production-run diagnosis. Recently, there have been several proposals for hardware-assiste...
Abdullah Muzahid, Darío Suárez Graci...
ICCAD
2005
IEEE
131views Hardware» more  ICCAD 2005»
14 years 4 months ago
Code restructuring for improving cache performance of MPSoCs
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
Guilin Chen, Mahmut T. Kandemir
ICPP
2006
IEEE
14 years 1 months ago
Data Transfers between Processes in an SMP System: Performance Study and Application to MPI
— This paper focuses on the transfer of large data in SMP systems. Achieving good performance for intranode communication is critical for developing an efficient communication s...
Darius Buntinas, Guillaume Mercier, William Gropp