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TC
2010
13 years 2 months ago
A Counter Architecture for Online DVFS Profitability Estimation
Dynamic voltage and frequency scaling (DVFS) is a well known and effective technique for reducing power consumption in modern microprocessors. An important concern though is to est...
Stijn Eyerman, Lieven Eeckhout
ISLPED
2005
ACM
87views Hardware» more  ISLPED 2005»
14 years 1 months ago
Runtime identification of microprocessor energy saving opportunities
High power consumption and low energy efficiency have become significant impediments to future performance improvements in modern microprocessors. This paper contributes to the so...
W. L. Bircher, M. Valluri, J. Law, L. K. John
MICRO
2008
IEEE
136views Hardware» more  MICRO 2008»
14 years 2 months ago
Power to the people: Leveraging human physiological traits to control microprocessor frequency
Any architectural optimization aims at satisfying the end user. However, modern architectures execute with little to no knowledge about the individual user. If architectures could...
Alex Shye, Yan Pan, Benjamin Scholbrock, J. Scott ...
SIGMETRICS
2010
ACM
162views Hardware» more  SIGMETRICS 2010»
14 years 13 days ago
Coordinated power management of voltage islands in CMPs
Multiple clock domain architectures have recently been proposed to alleviate the power problem in CMPs by having different frequency/voltage values assigned to each domain based o...
Asit K. Mishra, Shekhar Srikantaiah, Mahmut T. Kan...
CCGRID
2009
IEEE
13 years 11 months ago
Energy-Efficient Cluster Computing via Accurate Workload Characterization
This paper presents an eco-friendly daemon that reduces power and energy consumption while better maintaining high performance via an accurate workload characterization that infer...
S. Huang, W. Feng