73 search results - page 5 / 15 » Deterministic Logic BIST for Transition Fault Testing |
WISES
2003
13 years 9 months ago
2003
— With the increasing number of embedded computer systems being used in safety critical applications the testing and assessment of a system’s fault tolerance properties become ...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
We present a new method of built-in-self-test (BIST) for sequential circuits and system-on-a-chip (SOC) using characteristic faults and circuitspecific spectral information in th...
ATS
2009
IEEE
14 years 23 days ago
2009
IEEE
Caches are crucial components in modern processors (both stand-alone or integrated into SoCs) and their test is a challenging task, especially when addressing complex and high-fre...
ET
2002
13 years 7 months ago
2002
In this paper a novel architecture for scan-based mixed mode BIST is presented. To reduce the storage requirements for the deterministic patterns it relies on a two-dimensional co...
HASE
2007
IEEE
14 years 2 months ago
2007
IEEE
We study recent developments in quantum computing (QC) testing and fault tolerance (FT) techniques and discuss several attempts to formalize quantum logic fault models. We illustr...