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» Developments of the generative topographic mapping
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ICCAD
2008
IEEE
162views Hardware» more  ICCAD 2008»
14 years 4 months ago
MAPS: multi-algorithm parallel circuit simulation
— The emergence of multi-core and many-core processors has introduced new opportunities and challenges to EDA research and development. While the availability of increasing paral...
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
CGO
2007
IEEE
14 years 2 months ago
Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
Amir Hormati, Nathan Clark, Scott A. Mahlke
DSD
2003
IEEE
138views Hardware» more  DSD 2003»
14 years 1 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
EELC
2006
128views Languages» more  EELC 2006»
13 years 11 months ago
Evolving Distributed Representations for Language with Self-Organizing Maps
We present a neural-competitive learning model of language evolution in which several symbol sequences compete to signify a given propositional meaning. Both symbol sequences and p...
Simon D. Levy, Simon Kirby
CGF
2010
128views more  CGF 2010»
13 years 8 months ago
Isosurface Similarity Maps
In this paper, we introduce the concept of isosurface similarity maps for the visualization of volume data. Isosurface similarity maps present structural information of a volume d...
Stefan Bruckner, Torsten Möller