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» Diagonal routing in high performance microprocessor design
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ISVLSI
2005
IEEE
80views VLSI» more  ISVLSI 2005»
14 years 2 months ago
Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs
Mesh interconnect can be efficiently utilized while tree networks encourage the short routing distances. In this paper, we present the property analysis of a cluster-based interc...
Renqiu Huang, Ranga Vemuri
RTSS
2009
IEEE
14 years 3 months ago
Towards Stable Network Performance in Wireless Sensor Networks
Abstract—Many applications in wireless sensor networks require communication performance that is both consistent and high quality. Unfortunately, performance of current network p...
Shan Lin, Gang Zhou, Kamin Whitehouse, Yafeng Wu, ...
DATE
2006
IEEE
96views Hardware» more  DATE 2006»
14 years 2 months ago
Multi-sensor configurable platform for automotive applications
This paper presents a configurable and generic platform architecture suitable to interface several kinds of sensors for automotive applications. A platform-based design approach i...
L. Serafini, F. Carrai, T. Ramacciotti, V. Zolesi
CIKM
2009
Springer
14 years 12 days ago
Multidimensional routing indices for efficient distributed query processing
Traditional routing indices in peer-to-peer (P2P) networks are mainly designed for document retrieval applications and maintain aggregated one-dimensional values representing the ...
Christos Doulkeridis, Akrivi Vlachou, Kjetil N&osl...
DATE
2009
IEEE
110views Hardware» more  DATE 2009»
14 years 3 months ago
Light NUCA: A proposal for bridging the inter-cache latency gap
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
Darío Suárez Gracia, Teresa Monreal,...