410 search results - page 8 / 82 » Diagonal routing in high performance microprocessor design |
VLSID
2002
IEEE
14 years 8 days ago
2002
IEEE
Power consumption is becoming an increasingly important constraint in the design of microprocessors. This paper examines the use of multiple constrained processors running at lowe...
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable c...
IWCMC
2010
ACM
13 years 5 months ago
2010
ACM
This work presents a cross-layer modification to the DSR protocol which discovers high throughput paths on multi-hop wireless mesh networks. The modified DSR incorporates a metric...
TCAD
2010
13 years 2 months ago
2010
In recent years, structured application-specific integrated circuit (ASIC) design style has lessened the importance of mask cost. Multiple structured ASIC chip designs share the sa...
ICDCS
2006
IEEE
14 years 1 months ago
2006
IEEE
The stationary nature of nodes in a mesh network has shifted the main design goal of routing protocols from maintaining connectivity between source and destination nodes to findi...