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ICSE
1998
IEEE-ACM
14 years 2 months ago
Integrating Architecture Description Languages with a Standard Design Method
Software architecture descriptions are high-level models of software systems. Some researchers have proposed specialpurpose architectural notations that have a great deal of expre...
Jason E. Robbins, Nenad Medvidovic, David F. Redmi...
IPPS
1997
IEEE
14 years 2 months ago
Enhancing Software DSM for Compiler-Parallelized Applications
Current parallelizing compilers for message-passing machines only support a limited class of data-parallel applications. One method for eliminating this restriction is to combine ...
Peter J. Keleher, Chau-Wen Tseng
VLSID
1997
IEEE
399views VLSI» more  VLSID 1997»
14 years 2 months ago
A Self-Biased High Performance Folded Cascode CMOS Op-Amp
Cascode CMOS op-amps use a large number of external bias voltages. This results in numerous drawbacks, namely, an area and power overhead, susceptiblity of the bias lines to noise...
Pradip Mandal, V. Visvanathan
ICLP
1997
Springer
14 years 2 months ago
The Complexity of Model Checking in Modal Event Calculi
Kowalski and Sergot’s Event Calculus (EC) is a simple temporal formalism that, given a set of event occurrences, derives the maximal validity intervals (MVIs) over which propert...
Iliano Cervesato, Massimo Franceschet, Angelo Mont...
ICCAD
1993
IEEE
139views Hardware» more  ICCAD 1993»
14 years 2 months ago
Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors
— One major problem in pipeline synthesis is the detection and resolution of pipeline hazards. In this paper we present a new solution to the problem in the domain of pipelined a...
Ing-Jer Huang, Alvin M. Despain