55 search results - page 5 / 11 » Diffusion-based placement migration |
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Due to skewed scaling of interconnect delay and cell delay with technology scaling, modern VLSI timing closure requires use of extensive buffer insertion. Inserting a large number...
GECCO
2005
Springer
14 years 1 months ago
2005
Springer
Genetic Algorithms have worked fairly well for the VLSI cell placement problem, albeit with significant run times. Two parallel models for GA are presented for VLSI cell placemen...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
One of the major roadblocks in reduction of library generation cycle time is the layout generation phase. The two methods of doing automatic layout generation are synthesis and mig...
ICDCS
1999
IEEE
13 years 12 months ago
1999
IEEE
We describe methods of identifying and exploiting sharing patterns in multi-threaded DSM applications. Active correlation tracking is used to determine the affinity, or amount of ...
HPDC
2008
IEEE
14 years 2 months ago
2008
IEEE
In this paper we address the problem of managing heterogeneous workloads in a virtualized data center. We consider two different workloads: transactional applications and long-ru...