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ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
13 years 11 months ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
GLVLSI
2009
IEEE
146views VLSI» more  GLVLSI 2009»
13 years 11 months ago
A reconfigurable stochastic architecture for highly reliable computing
Mounting concerns over variability, defects and noise motivate a new approach for integrated circuits: the design of stochastic logic, that is to say, digital circuitry that opera...
Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan...
ASIACRYPT
2006
Springer
13 years 11 months ago
Simulation-Sound NIZK Proofs for a Practical Language and Constant Size Group Signatures
Non-interactive zero-knowledge proofs play an essential role in many cryptographic protocols. We suggest several NIZK proof systems based on prime order groups with a bilinear map...
Jens Groth
FASE
2000
Springer
13 years 11 months ago
Parallel Refinement Mechanisms for Real-Time Systems
This paper discusses highly general mechanisms for specifying the refinement of a real-time system as a collection of lower level parallel components that preserve the timing and f...
Paul Z. Kolano, Richard A. Kemmerer, Dino Mandriol...
FPGA
2000
ACM
120views FPGA» more  FPGA 2000»
13 years 11 months ago
A novel high throughput reconfigurable FPGA architecture
With increased logic density due to the shift towards Deep Submicron technologies (DSM), FPGAs have become a viable option for implementing large designs. However, most commercial...
Amit Singh, Luca Macchiarulo, Arindam Mukherjee, M...