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PATMOS
2005
Springer
14 years 1 months ago
Power - Performance Optimization for Custom Digital Circuits
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
Radu Zlatanovici, Borivoje Nikolic
ISCAS
2008
IEEE
101views Hardware» more  ISCAS 2008»
14 years 2 months ago
Digitally enhanced analog circuits: System aspects
— An overview of digital enhancement techniques for analog circuits is presented. Recent research suggests that the high density and low energy of digital circuits can be leverag...
Boris Murmann, Christian Vogel, Heinz Koeppl
DATE
2002
IEEE
126views Hardware» more  DATE 2002»
14 years 16 days ago
Automated Modeling of Custom Digital Circuits for Test
Models meant for logic verification and simulation are often used for ATPG. For custom digital circuits, these models contain many tristate devices, which leads to lower fault co...
Soumitra Bose
ITC
1996
IEEE
107views Hardware» more  ITC 1996»
13 years 11 months ago
Digital Integrated Circuit Testing using Transient Signal Analysis
A novel approach to testing CMOS digital circuits is presented that is based on an analysis of IDD switching transients on the supply rails and voltage transients at selected test...
James F. Plusquellic, Donald M. Chiarulli, Steven ...
EH
2004
IEEE
107views Hardware» more  EH 2004»
13 years 11 months ago
Evolving Digital Circuits using Multi Expression Programming
Multi Expression Programming (MEP) is a Genetic Programming (GP) variant that uses linear chromosomes for solution encoding. A unique MEP feature is its ability of encoding multipl...
Mihai Oltean, Crina Grosan