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ISLPED
2000
ACM
91views Hardware» more  ISLPED 2000»
14 years 1 months ago
New clock-gating techniques for low-power flip-flops
Two novel low power flip-flops are presented in the paper. Proposed flip-flops use new gating techniques that reduce power dissipation deactivating the clock signal. Presented cir...
Antonio G. M. Strollo, E. Napoli, Davide De Caro
CASES
2001
ACM
14 years 20 days ago
Pattern matching in reconfigurable logic for packet classification
We describe a digital circuit synthesis algorithm specialized for the domain of pattern matching circuits implemented in reconfigurable logic. We propose to use this algorithm as ...
Adam Johnson, Kenneth Mackenzie
BCS
2008
13 years 10 months ago
A Hardware Relaxation Paradigm for Solving NP-Hard Problems
Digital circuits with feedback loops can solve some instances of NP-hard problems by relaxation: the circuit will either oscillate or settle down to a stable state that represents...
Paul Cockshott, Andreas Koltes, John O'Donnell, Pa...
BMAS
2000
IEEE
14 years 1 months ago
Modeling and Simulation of a Sigma-Delta Digital to Analog Converter Using VHDL-AMS
— Sigma-Delta digital to analog converters are less vulnerable to circuit imperfections than their A/D counterparts because they have their noise-shaping loop all in the digital ...
Martin Vogels, Bart De Smedt, Georges G. E. Gielen
VTC
2006
IEEE
134views Communications» more  VTC 2006»
14 years 3 months ago
Ultra Low-Power Digital Demodulators for Short Range Applications
— In this paper we present extremely flexible and low power digital binary ASK, PSK, and FSK demodulator architectures for short-range applications that uses limiter amplifier (i...
Mehmet R. Yuce, Ahmet Tekin