We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....
1 sensors is to construct a structural description from sensor data and to match this description to a previously acquired model [Crowley 85]. An alternative is to project individu...
This paper presents a typed programming language and compiler for run-time code generation. The language, called ML2, extends ML with modal operators in the style of the Mini-ML2 ...
with this, the thread abstraction was introduced. While threads are handling events, or awaiting specific events, unrelated events can be handled by other threads. Unfortunately, ...