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ISPA
2005
Springer
14 years 1 months ago
Introduction to ChinaGrid Support Platform
Yongwei Wu, Song Wu, Huashan Yu, Chunming Hu
IPPS
2007
IEEE
14 years 2 months ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...
DSD
2009
IEEE
136views Hardware» more  DSD 2009»
13 years 12 months ago
An Evaluation of Behaviors of S-NUCA CMPs Running Scientific Workload
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
Pierfrancesco Foglia, Francesco Panicucci, Cosimo ...
ISSADS
2005
Springer
14 years 1 months ago
Database System Architecture - A Walk Through Time: From Centralized Platform to Mobile Computing - Keynote Address
Classical distributed database systems monolithically offer distribution transparency and higher performance. This is made possible by making data available and closer to the appl...
Ali R. Hurson, Yu Jiao
CLUSTER
2002
IEEE
14 years 28 days ago
Mixed Mode Matrix Multiplication
In modern clustering environments where the memory hierarchy has many layers (distributed memory, shared memory layer, cache,  ¡ ¢  ), an important question is how to fully u...
Meng-Shiou Wu, Srinivas Aluru, Ricky A. Kendall