Sciweavers

271 search results - page 37 / 55
» Distributed Problem Solving In SPite Of Processor Failures
Sort
View
IPPS
2006
IEEE
14 years 2 months ago
Parallel FPGA-based all-pairs shortest-paths in a directed graph
With rapid advances in VLSI technology, Field Programmable Gate Arrays (FPGAs) are receiving the attention of the Parallel and High Performance Computing community. In this paper,...
Uday Bondhugula, Ananth Devulapalli, Joseph Fernan...
IPPS
1997
IEEE
14 years 21 days ago
Optimal Scheduling for UET-UCT Generalized n-Dimensional Grid Task Graphs
The n-dimensional grid is one of the most representative patterns of data flow in parallel computation. The most frequently used scheduling models for grids is the unit execution ...
Theodore Andronikos, Nectarios Koziris, George K. ...
PODC
2009
ACM
14 years 9 months ago
Partial synchrony based on set timeliness
d Abstract] Marcos K. Aguilera Microsoft Research Silicon Valley Mountain View, CA, USA Carole Delporte-Gallet Universit? Paris 7 Paris, France Hugues Fauconnier Universit? Paris ...
Marcos Kawazoe Aguilera, Carole Delporte-Gallet, H...
PPOPP
2005
ACM
14 years 2 months ago
A linear-time algorithm for optimal barrier placement
We want to perform compile-time analysis of an SPMD program and place barriers in it to synchronize it correctly, minimizing the runtime cost of the synchronization. This is the b...
Alain Darte, Robert Schreiber
HPCA
2011
IEEE
13 years 6 days ago
Archipelago: A polymorphic cache design for enabling robust near-threshold operation
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...