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» Distributed Technology for Global Dominance
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ASAP
2003
IEEE
107views Hardware» more  ASAP 2003»
14 years 2 months ago
Energy Aware Register File Implementation through Instruction Predecode
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
José L. Ayala, Marisa Luisa López-Va...
CCGRID
2003
IEEE
14 years 2 months ago
Supporting Peer-to-Peer Computing with FlexiNet
Formation of suitable overlay-network topologies that are able to reflect the structure of the underlying network-infrastructure, has rarely been addressed by peer-to-peer applic...
Thomas Fuhrmann
ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
14 years 2 months ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
VLSID
1999
IEEE
104views VLSI» more  VLSID 1999»
14 years 1 months ago
Interconnect Optimization Strategies for High-Performance VLSI Designs
Interconnect tuning and repeater insertion are necessary to optimize interconnectdelay, signalperformanceandintegrity, andinterconnectmanufacturability and reliability. Repeater i...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto
ETS
2002
IEEE
150views Hardware» more  ETS 2002»
13 years 8 months ago
Assessing group learning and shared understanding in technology-mediated interaction
Without shared understanding, hardly any group learning takes place. Though much has been written about the essence of shared understanding, less is known about how to assess the ...
Ingrid Mulder, Janine Swaak, Joseph Kessels