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ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
14 years 14 days ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
HPCA
1996
IEEE
13 years 11 months ago
Co-Scheduling Hardware and Software Pipelines
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
Ramaswamy Govindarajan, Erik R. Altman, Guang R. G...
SAMOS
2007
Springer
14 years 1 months ago
Evaluating Large System-on-Chip on Multi-FPGA Platform
This paper presents a configurable base architecture tailorable for different applications. It allows simple and rapid way to evaluate and prototype large Multi-Processor System-on...
Ari Kulmala, Erno Salminen, Timo D. Hämä...
CISIS
2008
IEEE
14 years 2 months ago
Latency Impact on Spin-Lock Algorithms for Modern Shared Memory Multiprocessors
In 2006, John Mellor-Crummey and Michael Scott received the Dijkstra Prize in Distributed Computing. This prize was for their 1991 paper on algorithms for scalable synchronization ...
Jan Christian Meyer, Anne C. Elster
EMSOFT
2009
Springer
14 years 2 months ago
Clock-driven distributed real-time implementation of endochronous synchronous programs
An important step in model-based embedded system design consists in mapping functional specifications and their tasks/operations onto execution architectures and their ressources...
Dumitru Potop-Butucaru, Robert de Simone, Yves Sor...