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ICPP
2002
IEEE
14 years 2 months ago
Analysis of Memory Hierarchy Performance of Block Data Layout
Recently, several experimental studies have been conducted on block data layout as a data transformation technique used in conjunction with tiling to improve cache performance. In...
Neungsoo Park, Bo Hong, Viktor K. Prasanna
EUROPDS
1997
13 years 11 months ago
A Combined Virtual Shared Memory and Network which Schedules
In this paper, we follow a new path to arrive at the idea of a COMA — a Cache Only Memory Architecture. We show how the evolution of another architecture (ADARC) leads quite nat...
Ronald Moore, Bernd Klauer, Klaus Waldschmidt
COLCOM
2009
IEEE
14 years 2 months ago
Efficient dissemination of personalized video content in resource-constrained environments
— Video streaming on mobile devices such as PDA’s, laptop PCs, pocket PCs and cell phones is becoming increasingly popular. These mobile devices are typically constrained by th...
Piyush Parate, Lakshmish Ramaswamy, Suchendra M. B...
IEEEPACT
2009
IEEE
13 years 7 months ago
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...
PERCOM
2005
ACM
14 years 9 months ago
REDMAN: A Decentralized Middleware Solution for Cooperative Replication in Dense MANETs
The mass market of wireless devices is pushing towards service provisioning over dense Mobile Ad-hoc NETworks (MANETs), i.e., limited spatial regions, such as university campuses,...
Paolo Bellavista, Antonio Corradi, Eugenio Magistr...