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HPCA
2005
IEEE
14 years 1 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
SASO
2010
IEEE
13 years 5 months ago
Distributed Control for Small Customer Energy Demand Management
We present the ColoredPower algorithm, which is designed to provide collaborative electricity demand shaping for residential and small-business customers. Demand shaping for this m...
Vinayak V. Ranade, Jacob Beal
CF
2010
ACM
13 years 11 months ago
Towards greener data centers with storage class memory: minimizing idle power waste through coarse-grain management in fine-grai
Studies have shown much of today’s data centers are over-provisioned and underutilized. Over-provisioning cannot be avoided as these centers must anticipate peak load with burst...
In Hwan Doh, Young Jin Kim, Jung Soo Park, Eunsam ...
IPPS
1998
IEEE
13 years 12 months ago
Memory Hierarchy Management for Iterative Graph Structures
The increasing gap in processor and memory speeds has forced microprocessors to rely on deep cache hierarchies to keep the processors from starving for data. For many applications...
Ibraheem Al-Furaih, Sanjay Ranka
HPCA
2008
IEEE
14 years 8 months ago
Amdahl's Law in the multicore era
We apply Amdahl's Law to multicore chips using symmetric cores, asymmetric cores, and dynamic techniques that allows cores to work together on sequential execution. To Amdahl...
Mark D. Hill