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112
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HPCA
2005
IEEE
16 years 3 months ago
2005
IEEE
Due to the simulation time of the reference input set, architects often use alternative simulation techniques. Although these alternatives reduce the simulation time, what has not...
108
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HPCA
2005
IEEE
16 years 3 months ago
2005
IEEE
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
100
Voted
HPCA
2004
IEEE
16 years 3 months ago
2004
IEEE
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
104
Voted
HPCA
2004
IEEE
16 years 3 months ago
2004
IEEE
For highest performance, a modern microprocessor must be able to determine if an instruction is ready in the same cycle in which it is to be selected for execution. This creates a...
109
Voted
HPCA
2004
IEEE
16 years 3 months ago
2004
IEEE
Branch misprediction penalty consists of two components: the time wasted on mis-speculative execution until the mispredicted branch is resolved and the time to restart the pipelin...