7379 search results - page 1221 / 1476 » Distributed vector architectures |
177
Voted
HPCA
2003
IEEE
16 years 3 months ago
2003
IEEE
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
105
Voted
HPCA
2003
IEEE
16 years 3 months ago
2003
IEEE
To sustain instruction throughput rates in more aggressively clocked microarchitectures, microarchitects have incorporated larger and more complex branch predictors into their des...
124
Voted
HPCA
2003
IEEE
16 years 3 months ago
2003
IEEE
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
136
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HPCA
2003
IEEE
16 years 3 months ago
2003
IEEE
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
132
click to vote
HPCA
2003
IEEE
16 years 3 months ago
2003
IEEE
Predicated Execution can be used to alleviate the costs associated with frequently mispredicted branches. This is accomplished by trading the cost of a mispredicted branch for exe...