This paper describes a new architecture which addresses Quality of Service (QoS) by creating unique flows for applications, services, or subnets. A flow is a dedicated and indep...
Sunay Tripathi, Nicolas Droux, Thirumalai Srinivas...
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...
—Sensor networks represent a new frontier in technology that holds the promise of unprecedented levels of autonomy in the execution of complex dynamic missions by harnessing the ...
Abstract— We study leakage-power reduction in standby random access memories (SRAMs) during data-retention. An SRAM cell requires a minimum critical supply voltage (DRV) above wh...
Animesh Kumar, Huifang Qin, Prakash Ishwar, Jan M....