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TCAD
2011
13 years 4 months ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
ICML
1998
IEEE
14 years 11 months ago
Value Function Based Production Scheduling
Production scheduling, the problem of sequentially con guring a factory to meet forecasted demands, is a critical problem throughout the manufacturing industry. The requirement of...
Jeff G. Schneider, Justin A. Boyan, Andrew W. Moor...
TACAS
2009
Springer
212views Algorithms» more  TACAS 2009»
14 years 5 months ago
Semantic Reduction of Thread Interleavings in Concurrent Programs
Abstract. We propose a static analysis framework for concurrent programs based on reduction of thread interleavings using sound invariants on the top of partial order techniques. S...
Vineet Kahlon, Sriram Sankaranarayanan, Aarti Gupt...
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
14 years 2 months ago
Algorithms for Solving Boolean Satisfiability in Combinational Circuits
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalen...
Luís Guerra e Silva, Luis Miguel Silveira, ...
LREC
2010
176views Education» more  LREC 2010»
13 years 11 months ago
TTS Evaluation Campaign with a Common Spanish Database
This paper describes the first TTS evaluation campaign designed for Spanish. Seven research institutions took part in the evaluation campaign and developed a voice from a common s...
Iñaki Sainz, Eva Navas, Inma Hernáez...