173 search results - page 29 / 35 » Domain Reduction for the Circuit Constraint |
DAC
2008
ACM
14 years 8 months ago
2008
ACM
A fundamental problem in timing-driven physical synthesis is the reduction of critical paths in a design. In this work, we propose a powerful new technique that moves (and can als...
AINA
2009
IEEE
14 years 14 days ago
2009
IEEE
Device centric Service-oriented Architectures have shown to be applicable in the automation industry for interconnecting manufacturing devices and enterprise systems, thus, establ...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...
LCPC
2007
Springer
14 years 1 months ago
2007
Springer
Binary Decision Diagrams (BDDs) have recently become widely accepted as a space-efficient method of representing relations in points-to analyses. When BDDs are used to represent re...
TCAD
2008
13 years 7 months ago
2008
The relatively poor scaling of interconnect in modern digital circuits necessitates a number of design optimizations, which must typically be iterated several times to meet the spe...