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2006
IEEE
135views Hardware» more  DATE 2006»
14 years 23 days ago
FPGA architecture characterization for system level performance analysis
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
Douglas Densmore, Adam Donlin, Alberto L. Sangiova...
IEEEARES
2010
IEEE
13 years 5 months ago
A New DRM Architecture with Strong Enforcement
—We propose a new DRM architecture that utilizes a two-step enforcement process to enable strong security even in the case of a compromised DRM viewer. This is achieved by using ...
Sascha Müller, Stefan Katzenbeisser