Sciweavers

207 search results - page 22 / 42
» Dynamic Cache Switching in Reconfigurable Embedded Systems
Sort
View
DAC
2005
ACM
13 years 9 months ago
Dynamic reconfiguration with binary translation: breaking the ILP barrier with software compatibility
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
Antonio Carlos Schneider Beck, Luigi Carro
ERSA
2006
102views Hardware» more  ERSA 2006»
13 years 8 months ago
Process Isolation for Reconfigurable Hardware
One of the pillars of trust-worthy computing is process isolation, the ability to keep process data private from other processes running on the same device. While embedded operati...
Herwin Chan, Patrick Schaumont, Ingrid Verbauwhede
CODES
2010
IEEE
13 years 4 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
13 years 11 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
FDL
2004
IEEE
13 years 11 months ago
Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems
gn process of embedded systems moves currently towards higher levels of abstraction. As a consequence, a need arises for an early and realistic assessment of system level design d...
P. Hastono, Stephan Klaus, Sorin A. Huss