50 search results - page 4 / 10 » Dynamic FPGA routing for just-in-time FPGA compilation |
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
We propose two new FPGA routing switch designs that are programmable to operate in three different modes: highspeed, low-power or sleep. High-speed mode provides similar power an...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
Due to their layered approach, Networks-on-Chip (NoC) are a promising communication backbone in the field of heterogeneous dynamically reconfigurable systems. In this paper a fu...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
FPGA
2012
ACM
12 years 3 months ago
2012
ACM
In floating-point datapaths synthesized on FPGAs, the shifters that perform mantissa alignment and normalization consume a disproportionate number of LUTs. Shifters are implemente...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...