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IEEEPACT
1999
IEEE
14 years 2 months ago
A Cost-Effective Clustered Architecture
In current superscalar processors, all floating-point resources are idle during the execution of integer programs. As previous works show, this problem can be alleviated if the fl...
Ramon Canal, Joan-Manuel Parcerisa, Antonio Gonz&a...
IPPS
1999
IEEE
14 years 2 months ago
Marshaling/Demarshaling as a Compilation/Interpretation Process
Marshaling is the process through which structured values are serialized into a stream of bytes; demarshaling converts this stream of bytes back to structured values. Most often, ...
Christian Queinnec
ICCAD
1998
IEEE
94views Hardware» more  ICCAD 1998»
14 years 2 months ago
Noise considerations in circuit optimization
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
Andrew R. Conn, Ruud A. Haring, Chandramouli Viswe...
FOSSACS
1998
Springer
14 years 2 months ago
Functor Categories and Two-Level Languages
Abstract. We propose a denotational semantics for the two-level language of [GJ91, Gom92], and prove its correctness w.r.t. a standard denotational semantics. Other researchers (se...
Eugenio Moggi
DAC
1997
ACM
14 years 2 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...