473 search results - page 22 / 95 » Dynamic Memory Design for Low Data-Retention Power |
120
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ICCD
2000
IEEE
15 years 7 months ago
2000
IEEE
In this paper; we present a noise-immune highperformance static circuit family suitable for low-voltage operation called skewed logic. Skewed logic circuits, in comparison with Do...
158
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MTDT
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper highlights the cell current characterization of a low leakage 6T SRAM by adjusting the threshold voltages of the transistors in the memory array to reduce the standby p...
117
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CF
2008
ACM
15 years 4 months ago
2008
ACM
Power consumption has become a very important metric and challenging research topic in the design of microprocessors in the recent years. The goal of this work is to improve power...
109
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ICCAD
2003
IEEE
15 years 11 months ago
2003
IEEE
Dynamic Power Management or DPM refers to the problem of judicious application of various low power techniques based on runtime conditions in an embedded system to minimize the to...
109
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ERSA
2006
15 years 4 months ago
2006
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...