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» Dynamic Memory Design for Low Data-Retention Power
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NPL
2007
109views more  NPL 2007»
13 years 8 months ago
Generative Modeling of Autonomous Robots and their Environments using Reservoir Computing
Autonomous mobile robots form an important research topic in the field of robotics due to their near-term applicability in the real world as domestic service robots. These robots ...
Eric A. Antonelo, Benjamin Schrauwen, Jan M. Van C...
TC
2008
13 years 8 months ago
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
ASIASIM
2004
Springer
14 years 2 months ago
LSTAFF: System Software for Large Block Flash Memory
Abstract. Recently, flash memory is widely used in embedded applications since it has strong points: non-volatility, fast access speed, shock resistance, and low power consumption...
Tae-Sun Chung, Dong-Joo Park, Yeonseung Ryu, Sugwo...
IPPS
2006
IEEE
14 years 2 months ago
Conjugate gradient sparse solvers: performance-power characteristics
We characterize the performance and power attributes of the conjugate gradient (CG) sparse solver which is widely used in scientific applications. We use cycle-accurate simulatio...
Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary ...
DAC
2002
ACM
14 years 9 months ago
Automatic data migration for reducing energy consumption in multi-bank memory systems
An architectural solution to reducing memory energy consumption is to adopt a multi-bank memory system instead of a monolithic (single-bank) memory system. Some recent multi-bank ...
Victor De La Luz, Mahmut T. Kandemir, Ibrahim Kolc...