473 search results - page 84 / 95 » Dynamic Memory Design for Low Data-Retention Power |
EWSN
2009
Springer
14 years 8 months ago
2009
Springer
Sensor sleeping is a widely-used and cost-effective technique to save energy in wireless sensor networks. Protocols at different stack levels can, either individually or simultaneo...
OPODIS
2004
13 years 9 months ago
2004
Abstract. We present an efficient and practical lock-free implementation of a concurrent deque that supports parallelism for disjoint accesses and uses atomic primitives which are ...
CLUSTER
2008
IEEE
14 years 2 months ago
2008
IEEE
—The increasing performance and decreasing cost of processors and memory are causing system intelligence to move from the CPU to peripherals such as disk drives. Storage system d...
ICCAD
2002
IEEE
14 years 13 days ago
2002
IEEE
The ultimate goal of logic synthesis is to explore implementation flexibility toward meeting design targets, such as area, power, and delay. Traditionally, such flexibility is exp...
MICRO
2008
IEEE
14 years 1 months ago
2008
IEEE
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...