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» Dynamic Memory Design for Low Data-Retention Power
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EUROSYS
2007
ACM
14 years 4 months ago
Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors
The major chip manufacturers have all introduced chip multiprocessing (CMP) and simultaneous multithreading (SMT) technology into their processing units. As a result, even low-end...
David K. Tam, Reza Azimi, Michael Stumm
PVLDB
2010
164views more  PVLDB 2010»
13 years 5 months ago
FlashStore: High Throughput Persistent Key-Value Store
We present FlashStore, a high throughput persistent keyvalue store, that uses flash memory as a non-volatile cache between RAM and hard disk. FlashStore is designed to store the ...
Biplob Debnath, Sudipta Sengupta, Jin Li
ICMI
2004
Springer
162views Biometrics» more  ICMI 2004»
14 years 26 days ago
When do we interact multimodally?: cognitive load and multimodal communication patterns
Mobile usage patterns often entail high and fluctuating levels of difficulty as well as dual tasking. One major theme explored in this research is whether a flexible multimodal in...
Sharon L. Oviatt, Rachel Coulston, Rebecca Lunsfor...
ASPLOS
2006
ACM
14 years 1 months ago
Introspective 3D chips
While the number of transistors on a chip increases exponentially over time, the productivity that can be realized from these systems has not kept pace. To deal with the complexit...
Shashidhar Mysore, Banit Agrawal, Navin Srivastava...
CN
2002
82views more  CN 2002»
13 years 7 months ago
Optimal allocation of electronic content
Abstract-The delivery of large files to single users, such as application programs for some versions of the envisioned network computer, or movies, is expected by many to be one of...
Israel Cidon, Shay Kutten, Ran Soffer