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HIPEAC
2007
Springer
14 years 1 months ago
Performance/Energy Optimization of DSP Transforms on the XScale Processor
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
Paolo D'Alberto, Markus Püschel, Franz Franch...
ISSAC
2007
Springer
177views Mathematics» more  ISSAC 2007»
14 years 1 months ago
Component-level parallelization of triangular decompositions
We discuss the parallelization of algorithms for solving polynomial systems symbolically by way of triangular decompositions. We introduce a component-level parallelism for which ...
Marc Moreno Maza, Yuzhen Xie
LCTRTS
2007
Springer
14 years 1 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
LCTRTS
2007
Springer
14 years 1 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
TGC
2007
Springer
14 years 1 months ago
Logical Networks: Towards Foundations for Programmable Overlay Networks and Overlay Computing Systems
Abstract. We propose and discuss foundations for programmable overlay networks and overlay computing systems. Such overlays are built over a large number of distributed computation...
Luigi Liquori, Michel Cosnard
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