Sciweavers

74 search results - page 6 / 15
» Dynamic Reallocation of Functional Units in Superscalar Proc...
Sort
View
ISPASS
2006
IEEE
14 years 1 months ago
Characterizing the branch misprediction penalty
Despite years of study, branch mispredictions remain as a significant performance impediment in pipelined superscalar processors. In general, the branch misprediction penalty can...
Stijn Eyerman, James E. Smith, Lieven Eeckhout
DATE
2002
IEEE
100views Hardware» more  DATE 2002»
14 years 13 days ago
AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors
This paper describes the AccuPower toolset -- a set of simulation tools accurately estimating the power dissipation within a superscalar microprocessor. AccuPower uses a true hard...
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
ASAP
2004
IEEE
141views Hardware» more  ASAP 2004»
13 years 11 months ago
Evaluating Instruction Set Extensions for Fast Arithmetic on Binary Finite Fields
Binary finite fields GF(2n ) are very commonly used in cryptography, particularly in publickey algorithms such as Elliptic Curve Cryptography (ECC). On word-oriented programmable ...
A. Murat Fiskiran, Ruby B. Lee
JSA
2008
74views more  JSA 2008»
13 years 7 months ago
Resource conflict detection in simulation of function unit pipelines
Processor simulators are important parts of processor design toolsets in which they are used to verify and evaluate the properties of the designed processors. While simulating arch...
Pekka Jääskeläinen, Vladimír...
CHARME
2001
Springer
98views Hardware» more  CHARME 2001»
13 years 12 months ago
Hardware Synthesis Using SAFL and Application to Processor Design
Abstract. We survey the work done so far in the FLaSH project (Functional Languages for Synthesising Hardware) in which the core ideas are (i) using a functional language SAFL to d...
Alan Mycroft, Richard Sharp