49 search results - page 5 / 10 » Dynamic Register Renaming Through Virtual-Physical Registers |
ISCA
2009
IEEE
14 years 1 months ago
2009
IEEE
While Moore’s Law predicts the ability of semi-conductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in t...
VEE
2012
ACM
12 years 2 months ago
2012
ACM
Code quality and compilation speed are two challenges to JIT compilers, while selective compilation is commonly used to tradeoff these two issues. Meanwhile, with more and more Ja...
ISCA
1992
IEEE
13 years 11 months ago
1992
IEEE
A quantitative analysis of program execution is essential to the computer architecture design process. With the current trend in architecture of enhancing the performance of unipr...
PRDC
2008
IEEE
14 years 1 months ago
2008
IEEE
Reliability has become a serious concern as systems embrace nanometer technologies. In this paper, we propose a novel approach for organizing redundancy that provides high degree ...
ISLPED
2003
ACM
14 years 6 days ago
2003
ACM
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...