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» Dynamic Reverse Code Generation for Backward Execution
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ASPLOS
2012
ACM
12 years 3 months ago
Comprehensive kernel instrumentation via dynamic binary translation
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...
Peter Feiner, Angela Demke Brown, Ashvin Goel
ISCA
2002
IEEE
104views Hardware» more  ISCA 2002»
13 years 7 months ago
Speculative Dynamic Vectorization
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
Alex Pajuelo, Antonio González, Mateo Valer...
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
14 years 20 days ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
SIGMETRICS
1996
ACM
174views Hardware» more  SIGMETRICS 1996»
13 years 11 months ago
Embra: Fast and Flexible Machine Simulation
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
Emmett Witchel, Mendel Rosenblum
CASES
2004
ACM
14 years 25 days ago
Hardware assisted control flow obfuscation for embedded processors
+ With more applications being deployed on embedded platforms, software protection becomes increasingly important. This problem is crucial on embedded systems like financial transa...
Xiaotong Zhuang, Tao Zhang, Hsien-Hsin S. Lee, San...