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HPCC
2009
Springer
13 years 12 months ago
On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...
ICS
2007
Tsinghua U.
14 years 1 months ago
Sensitivity analysis for automatic parallelization on multi-cores
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...
Silvius Rus, Maikel Pennings, Lawrence Rauchwerger
DATE
2006
IEEE
123views Hardware» more  DATE 2006»
14 years 1 months ago
Constructing portable compiled instruction-set simulators: an ADL-driven approach
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless other functions. This paper presents a framework th...
Joseph D'Errico, Wei Qin
CORR
2006
Springer
77views Education» more  CORR 2006»
13 years 7 months ago
Prioritizing Software Inspection Results using Static Profiling
Static software checking tools are useful as an additional automated software inspection step that can easily be integrated in the development cycle and assist in creating secure,...
Cathal Boogerd, Leon Moonen
HIPEAC
2007
Springer
14 years 1 months ago
Performance/Energy Optimization of DSP Transforms on the XScale Processor
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
Paolo D'Alberto, Markus Püschel, Franz Franch...