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ASPLOS
2008
ACM
13 years 10 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
JSAC
2007
95views more  JSAC 2007»
13 years 8 months ago
Experiences in implementing an experimental wide-area GMPLS network
In this article, we describe our experiences in implementing an experimental wide-area GMPLS network called CHEETAH (Circuit-Switched End-to-End Transport Architecture). The key c...
Xiangfei Zhu, Xuan Zheng, Malathi Veeraraghavan
ICEB
2004
234views Business» more  ICEB 2004»
13 years 10 months ago
A Component-based Framework for Distributed Business Simulations in E-Business Environments
Simulations preserve the knowledge of complex dynamic systems and consequently transfer the knowledge of the cohesions of its elements to a specified target group. As the progress...
Alexander Hampel, Edward Bernroider
ARCS
2010
Springer
14 years 3 months ago
How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT
This paper describes how a superscalar in-order processor must be modified to support Simultaneous Multithreading (SMT) such that time-predictability is preserved for hard real-ti...
Jörg Mische, Irakli Guliashvili, Sascha Uhrig...
DATE
2005
IEEE
180views Hardware» more  DATE 2005»
14 years 2 months ago
A Coprocessor for Accelerating Visual Information Processing
Visual information processing will play an increasingly important role in future electronics systems. In many applications, e.g. video surveillance cameras, data throughput of mic...
Walter Stechele, L. Alvado Cárcel, Stephan ...