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» Dynamic Voltage and Cache Reconfiguration for Low Power
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GLVLSI
2002
IEEE
135views VLSI» more  GLVLSI 2002»
14 years 9 days ago
Low swing dual threshold voltage domino logic
A low swing domino logic technique is proposed to decrease power consumption without sacrificing noise immunity. With the proposed low swing domino logic circuit technique, active...
Volkan Kursun, Eby G. Friedman
LCTRTS
2007
Springer
14 years 1 months ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...
VLSID
2004
IEEE
122views VLSI» more  VLSID 2004»
14 years 7 months ago
A System Approach to Energy Management
: The accumulation of popular features in portable products such as mobile handsets is driving battery life to unacceptably low levels. Substantial change will not come from increm...
Dennis Monticelli
AHS
2006
IEEE
152views Hardware» more  AHS 2006»
14 years 1 months ago
Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) architecture that has been proposed for reconfigurable Multiprocessor system-on-chip ...
Balal Ahmad, Ahmet T. Erdogan, Sami Khawam
IPPS
1998
IEEE
13 years 11 months ago
Evaluation of a Low-Power Reconfigurable DSP Architecture
Abstract. Programmability is an important capability that provides flexible computing devices, but it incurs significant performance and power penalties. We have proposed an archit...
Arthur Abnous, Katsunori Seno, Yuji Ichikawa, Marl...